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| author | Marc Zyngier <maz@kernel.org> | 2019-05-22 20:16:49 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-08-18 20:38:49 +0300 |
| commit | 363518f37a86acc515defae6d1ba91a6c7617de9 (patch) | |
| tree | 6f1672303b5dac0f33a01eb764e94e0c2b2eef67 /virt/kvm/arm/vgic/vgic-its.c | |
| parent | b4931afcde1ffccd4a406009aef33c14bc6c6cb8 (diff) | |
| download | linux-363518f37a86acc515defae6d1ba91a6c7617de9.tar.xz | |
KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on ITS disable
If an ITS gets disabled, we need to make sure that further interrupts
won't hit in the cache. For that, we invalidate the translation cache
when the ITS is disabled.
Tested-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'virt/kvm/arm/vgic/vgic-its.c')
| -rw-r--r-- | virt/kvm/arm/vgic/vgic-its.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c index 09a179820816..05406bd92ce9 100644 --- a/virt/kvm/arm/vgic/vgic-its.c +++ b/virt/kvm/arm/vgic/vgic-its.c @@ -1597,6 +1597,8 @@ static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its, goto out; its->enabled = !!(val & GITS_CTLR_ENABLE); + if (!its->enabled) + vgic_its_invalidate_cache(kvm); /* * Try to process any pending commands. This function bails out early |