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authorAndy Walls <awalls@radix.net>2009-09-27 07:00:48 +0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2009-12-05 23:40:18 +0300
commite283d78083271c9faf784daad6367dfb903d0f06 (patch)
tree23c371b1b9aa4fcc2e609fe10785f497d63d2e34 /tools
parent9eef550a9a98c1e3d15aaf490812949fdeb01c7c (diff)
downloadlinux-e283d78083271c9faf784daad6367dfb903d0f06.tar.xz
V4L/DVB (13090): cx25840: Init PLLs properly for CX2388[578] A/V cores
The SYS and AUX PLLs need to be initialized to different values based on the chip: CX23885, CX23887, CX23888, as each uses a different crystal frequency: 28.6363 MHz, 25.0 MHz, 50.0 MHz. Signed-off-by: Andy Walls <awalls@radix.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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