diff options
| author | Harry Pan <harry.pan@intel.com> | 2018-03-09 15:15:48 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2018-03-31 12:28:36 +0300 |
| commit | 1159e09476536250c2a0173d4298d15114df7a89 (patch) | |
| tree | c7602afbb5f98b270f071b87e695ffd8d3218911 /tools/perf/util/map.h | |
| parent | 490d03e83da2a5e9d7db84b1ec30a9c95415787e (diff) | |
| download | linux-1159e09476536250c2a0173d4298d15114df7a89.tar.xz | |
perf/x86/intel: Enable C-state residency events for Cannon Lake
Cannon Lake supports C1/C3/C6/C7, PC2/PC3/PC6/PC7/PC8/PC9/PC10
state residency counters, this patch enables those counters.
( The MSR information is based on Intel Software Developers' Manual,
Vol. 4, Order No. 335592. )
Tested-by: Puthikorn Voravootivat <puthik@chromium.org>
Signed-off-by: Harry Pan <harry.pan@intel.com>
Reviewed-by: Benson Leung <bleung@chromium.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan.liang@intel.com
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: gs0622@gmail.com
Link: http://lkml.kernel.org/r/20180309121549.630-3-harry.pan@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'tools/perf/util/map.h')
0 files changed, 0 insertions, 0 deletions