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authorShubhrajyoti Datta <shubhrajyoti.datta@amd.com>2023-06-20 14:01:37 +0300
committerStephen Boyd <sboyd@kernel.org>2023-07-19 23:09:54 +0300
commit64446fe08c55dfa1f4489bc6366545c7180268b8 (patch)
tree482f39cae56aedf887c88a86522fdbe297e3ea8b /tools/perf/scripts/python
parentbbb8eb3cb06f66866726ddacfbf7c1411a40565d (diff)
downloadlinux-64446fe08c55dfa1f4489bc6366545c7180268b8.tar.xz
dt-bindings: clock: versal: Add versal-net compatible string
Add dt-binding documentation for Versal NET platforms. Versal Net is a new AMD/Xilinx SoC. The SoC and its architecture is based on the Versal ACAP device. The Versal Net device includes more security features in the platform management controller (PMC) and increases the number of CPUs in the application processing unit (APU) and the real-time processing unit (RPU). Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> Link: https://lore.kernel.org/r/20230620110137.5701-1-shubhrajyoti.datta@amd.com Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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