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| author | Shawn Guo <shawn.guo@freescale.com> | 2014-08-26 19:06:33 +0400 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@freescale.com> | 2014-09-16 06:06:49 +0400 |
| commit | dc4805c2e78ba5a22ea1632f3e3e4ee601a1743b (patch) | |
| tree | e52405d9455d430552e3de64d83d0a34864760a6 /tools/perf/scripts/python | |
| parent | db7c0659452c5f490ea5048390ad94de786f4b85 (diff) | |
| download | linux-dc4805c2e78ba5a22ea1632f3e3e4ee601a1743b.tar.xz | |
ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver
Since ENABLE and BYPASS bits of PLLs are now implemented as separate
gate and mux clocks by clock drivers, the code handling these two bits
can be removed from clk-pllv3 driver.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions