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author | George Shen <george.shen@amd.com> | 2024-02-17 03:37:03 +0300 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2024-03-27 08:40:47 +0300 |
commit | 9712b64d6f3f173aff10322fd22dc3678758b8c3 (patch) | |
tree | 82449c42af17ae507eb9a060207b2eafbeb1436b /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 506d32ee9f9b65c9680ff15ceb8c4c1e91fe71d8 (diff) | |
download | linux-9712b64d6f3f173aff10322fd22dc3678758b8c3.tar.xz |
drm/amd/display: Remove MPC rate control logic from DCN30 and above
[Why]
MPC flow rate control is not needed for DCN30 and above. Current logic
that uses it can result in underflow for certain edge cases (such as
DSC N422 + ODM combine + 422 left edge pixel).
[How]
Remove MPC flow rate control logic and programming for DCN30 and above.
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions