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authorChen-Yu Tsai <wens@csie.org>2016-01-21 08:26:41 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-01-25 02:01:21 +0300
commit02df9cb85e156924339f2244aec29dcc37d9ab8c (patch)
tree52ef35fe3698685775daf6cef53aa2605aa153c8 /tools/perf/scripts/python/call-graph-from-postgresql.py
parent675ec62b08480fe1250c70cba61ad6e74652ed6f (diff)
downloadlinux-02df9cb85e156924339f2244aec29dcc37d9ab8c.tar.xz
ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC
mmc2 has a special pin for eMMC hardware reset, which is controllable from the controller. Add the "mmc-cap-hw-reset" property to denote that this controller supports this function, and the pins are actually used. Also increase the signal drive strength for mmc2 pins, for HS-DDR mode support. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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