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author | Jin Yao <yao.jin@linux.intel.com> | 2021-05-27 03:16:03 +0300 |
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committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2021-06-01 17:02:56 +0300 |
commit | ddc11da5eb37e27a4b66cddcaf11233ef51b3a79 (patch) | |
tree | d66a6b6b411a14b577c662a1f2e74b152df835cd /tools/perf/arch | |
parent | a483e64c0b62e93a772cbc96f32bad885586fad7 (diff) | |
download | linux-ddc11da5eb37e27a4b66cddcaf11233ef51b3a79.tar.xz |
perf tools: Check mem-loads auxiliary event
For some platforms, an auxiliary event has to be enabled
simultaneously with the load latency event.
For Alderlake, the auxiliary event is created in "cpu_core" pmu.
So first we need to check the existing of "cpu_core" pmu
and then check if this pmu has auxiliary event.
Signed-off-by: Jin Yao <yao.jin@linux.intel.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20210527001610.10553-2-yao.jin@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/arch')
-rw-r--r-- | tools/perf/arch/x86/util/mem-events.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/tools/perf/arch/x86/util/mem-events.c b/tools/perf/arch/x86/util/mem-events.c index 588110fd8904..e79232e3f2a0 100644 --- a/tools/perf/arch/x86/util/mem-events.c +++ b/tools/perf/arch/x86/util/mem-events.c @@ -11,8 +11,13 @@ static bool mem_loads_name__init; bool is_mem_loads_aux_event(struct evsel *leader) { - if (!pmu_have_event("cpu", "mem-loads-aux")) - return false; + if (perf_pmu__find("cpu")) { + if (!pmu_have_event("cpu", "mem-loads-aux")) + return false; + } else if (perf_pmu__find("cpu_core")) { + if (!pmu_have_event("cpu_core", "mem-loads-aux")) + return false; + } return leader->core.attr.config == MEM_LOADS_AUX; } |