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author | David S. Miller <davem@davemloft.net> | 2020-04-26 05:24:42 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2020-04-26 06:18:53 +0300 |
commit | d483389678f9e03d53f226641ea39679debcbc81 (patch) | |
tree | e33c9e59627e806ef97be9ef66c48afb1e4ab393 /tools/arch/x86/include/asm/msr-index.h | |
parent | 6033cebdfff9b10192eb254e8cc60fedd595ea7f (diff) | |
parent | b2768df24ec400dd4f7fa79542f797e904812053 (diff) | |
download | linux-d483389678f9e03d53f226641ea39679debcbc81.tar.xz |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Simple overlapping changes to linux/vermagic.h
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/arch/x86/include/asm/msr-index.h')
-rw-r--r-- | tools/arch/x86/include/asm/msr-index.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h index d5e517d1c3dd..12c9684d59ba 100644 --- a/tools/arch/x86/include/asm/msr-index.h +++ b/tools/arch/x86/include/asm/msr-index.h @@ -41,6 +41,10 @@ /* Intel MSRs. Some also available on other CPUs */ +#define MSR_TEST_CTRL 0x00000033 +#define MSR_TEST_CTRL_SPLIT_LOCK_DETECT_BIT 29 +#define MSR_TEST_CTRL_SPLIT_LOCK_DETECT BIT(MSR_TEST_CTRL_SPLIT_LOCK_DETECT_BIT) + #define MSR_IA32_SPEC_CTRL 0x00000048 /* Speculation Control */ #define SPEC_CTRL_IBRS BIT(0) /* Indirect Branch Restricted Speculation */ #define SPEC_CTRL_STIBP_SHIFT 1 /* Single Thread Indirect Branch Predictor (STIBP) bit */ @@ -70,6 +74,11 @@ */ #define MSR_IA32_UMWAIT_CONTROL_TIME_MASK (~0x03U) +/* Abbreviated from Intel SDM name IA32_CORE_CAPABILITIES */ +#define MSR_IA32_CORE_CAPS 0x000000cf +#define MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT_BIT 5 +#define MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT BIT(MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT_BIT) + #define MSR_PKG_CST_CONFIG_CONTROL 0x000000e2 #define NHM_C3_AUTO_DEMOTE (1UL << 25) #define NHM_C1_AUTO_DEMOTE (1UL << 26) |