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author | Thomas Gleixner <tglx@linutronix.de> | 2017-11-02 21:18:08 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2017-11-02 21:18:08 +0300 |
commit | 722c908f84c67bf120105ca870675cadc1bb7b20 (patch) | |
tree | 1fb261d952624623e35f1f4ec958c7b4e4226d96 /tools/arch/x86/include/asm/disabled-features.h | |
parent | 10d94ff4d558b96bfc4f55bb0051ae4d938246fe (diff) | |
parent | 61dc367e5d767e1c56147f6e497d13cc2771abb1 (diff) | |
download | linux-722c908f84c67bf120105ca870675cadc1bb7b20.tar.xz |
Merge tag 'irqchip-4.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull the second batch of irqchip updates for 4.15 from marc Zyngier:
- A number of MIPS GIC updates and cleanups
- One GICv4 update
- Another firmware workaround for GICv2
- Support for Mason8 GPIOs
- Tiny documentation fix
Diffstat (limited to 'tools/arch/x86/include/asm/disabled-features.h')
-rw-r--r-- | tools/arch/x86/include/asm/disabled-features.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/tools/arch/x86/include/asm/disabled-features.h b/tools/arch/x86/include/asm/disabled-features.h index 5dff775af7cd..c10c9128f54e 100644 --- a/tools/arch/x86/include/asm/disabled-features.h +++ b/tools/arch/x86/include/asm/disabled-features.h @@ -21,11 +21,13 @@ # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31)) # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31)) # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31)) +# define DISABLE_PCID 0 #else # define DISABLE_VME 0 # define DISABLE_K6_MTRR 0 # define DISABLE_CYRIX_ARR 0 # define DISABLE_CENTAUR_MCR 0 +# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31)) #endif /* CONFIG_X86_64 */ #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS @@ -49,7 +51,7 @@ #define DISABLED_MASK1 0 #define DISABLED_MASK2 0 #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR) -#define DISABLED_MASK4 0 +#define DISABLED_MASK4 (DISABLE_PCID) #define DISABLED_MASK5 0 #define DISABLED_MASK6 0 #define DISABLED_MASK7 0 |