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authorMark Brown <broonie@kernel.org>2021-05-24 14:54:49 +0300
committerMark Brown <broonie@kernel.org>2021-05-24 14:54:49 +0300
commiteb37ca9c98ae1a61eb9bbe157d320bbe858adbf4 (patch)
treef8b0d0adbcb427ba537dbbd0e592fa6603d0a7f2 /sound
parentaf00978a0a06bab60bd5adf54a65ea69d19ce35d (diff)
parentd6956a7dde6fbf843da117f8b69cc512101fdea2 (diff)
downloadlinux-eb37ca9c98ae1a61eb9bbe157d320bbe858adbf4.tar.xz
Merge series "ASoC: rsnd: add D3 support" from Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>:
Hi Mark, Rob These adds R-Car D3 support for rsnd driver. [1/3] is tidyup patch for dt-bindings (not only for D3). [2/3], [3/3] are for R-Car D3. Kuninori Morimoto (3): ASoC: dt-bindings: renesas: rsnd: tidyup properties ASoC: rsnd: tidyup loop on rsnd_adg_clk_query() ASoC: rsnd: add null CLOCKIN support .../bindings/sound/renesas,rsnd.yaml | 10 ++++- sound/soc/sh/rcar/adg.c | 37 ++++++++++++++++--- 2 files changed, 41 insertions(+), 6 deletions(-) -- 2.25.1
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/sh/rcar/adg.c37
1 files changed, 32 insertions, 5 deletions
diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
index 0b8ae3eee148..e13eb201d550 100644
--- a/sound/soc/sh/rcar/adg.c
+++ b/sound/soc/sh/rcar/adg.c
@@ -3,8 +3,8 @@
// Helper routines for R-Car sound ADG.
//
// Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-
#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
#include "rsnd.h"
#define CLKA 0
@@ -290,7 +290,6 @@ static void rsnd_adg_set_ssi_clk(struct rsnd_mod *ssi_mod, u32 val)
int rsnd_adg_clk_query(struct rsnd_priv *priv, unsigned int rate)
{
struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
- struct clk *clk;
int i;
int sel_table[] = {
[CLKA] = 0x1,
@@ -303,10 +302,9 @@ int rsnd_adg_clk_query(struct rsnd_priv *priv, unsigned int rate)
* find suitable clock from
* AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC/AUDIO_CLKI.
*/
- for_each_rsnd_clk(clk, adg, i) {
+ for (i = 0; i < CLKMAX; i++)
if (rate == adg->clk_rate[i])
return sel_table[i];
- }
/*
* find divided clock from BRGA/BRGB
@@ -391,6 +389,30 @@ void rsnd_adg_clk_control(struct rsnd_priv *priv, int enable)
}
}
+#define NULL_CLK "rsnd_adg_null"
+static struct clk *rsnd_adg_null_clk_get(struct rsnd_priv *priv)
+{
+ static struct clk_hw *hw;
+ struct device *dev = rsnd_priv_to_dev(priv);
+
+ if (!hw) {
+ struct clk_hw *_hw;
+ int ret;
+
+ _hw = clk_hw_register_fixed_rate_with_accuracy(dev, NULL_CLK, NULL, 0, 0, 0);
+ if (IS_ERR(_hw))
+ return NULL;
+
+ ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, _hw);
+ if (ret < 0)
+ clk_hw_unregister_fixed_rate(_hw);
+
+ hw = _hw;
+ }
+
+ return clk_hw_get_clk(hw, NULL_CLK);
+}
+
static void rsnd_adg_get_clkin(struct rsnd_priv *priv,
struct rsnd_adg *adg)
{
@@ -400,7 +422,12 @@ static void rsnd_adg_get_clkin(struct rsnd_priv *priv,
for (i = 0; i < CLKMAX; i++) {
struct clk *clk = devm_clk_get(dev, clk_name[i]);
- adg->clk[i] = IS_ERR(clk) ? NULL : clk;
+ if (IS_ERR(clk))
+ clk = rsnd_adg_null_clk_get(priv);
+ if (IS_ERR(clk))
+ dev_err(dev, "no adg clock (%s)\n", clk_name[i]);
+
+ adg->clk[i] = clk;
}
}