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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2015-11-10 08:09:52 +0300
committerMark Brown <broonie@kernel.org>2015-11-18 21:08:16 +0300
commite8e7b7bdc65c19f8d84c25f7e0d21176d598c870 (patch)
tree42cd004d05b94b8c3c10e9252182ba59911d7489 /sound/soc/sh/rcar/adg.c
parentf46a93b820eb3707faf238cd769a004e2504515f (diff)
downloadlinux-e8e7b7bdc65c19f8d84c25f7e0d21176d598c870.tar.xz
ASoC: rsnd: remove Gen1 support from SRC
This patch removes SRC Gen1 support which has no user on upstream. Historically, SRC Gen1 was created as prepare for SRC Gen2 support. It works well for Gen2 support, but Gen1 is not same as Gen2. So now, Gen1 support is no longer needed. Thanks Gen1 and Bye-bye. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/sh/rcar/adg.c')
-rw-r--r--sound/soc/sh/rcar/adg.c62
1 files changed, 0 insertions, 62 deletions
diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
index 1946ce8baf2e..1dffde3218be 100644
--- a/sound/soc/sh/rcar/adg.c
+++ b/sound/soc/sh/rcar/adg.c
@@ -242,68 +242,6 @@ int rsnd_adg_set_convert_timing_gen2(struct rsnd_mod *src_mod,
return rsnd_adg_set_src_timsel_gen2(src_mod, io, val);
}
-int rsnd_adg_set_convert_clk_gen1(struct rsnd_priv *priv,
- struct rsnd_mod *mod,
- unsigned int src_rate,
- unsigned int dst_rate)
-{
- struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
- struct rsnd_mod *adg_mod = rsnd_mod_get(adg);
- struct device *dev = rsnd_priv_to_dev(priv);
- int idx, sel, div, shift;
- u32 mask, val;
- int id = rsnd_mod_id(mod);
- unsigned int sel_rate [] = {
- clk_get_rate(adg->clk[CLKA]), /* 000: CLKA */
- clk_get_rate(adg->clk[CLKB]), /* 001: CLKB */
- clk_get_rate(adg->clk[CLKC]), /* 010: CLKC */
- 0, /* 011: MLBCLK (not used) */
- adg->rbga_rate_for_441khz, /* 100: RBGA */
- adg->rbgb_rate_for_48khz, /* 101: RBGB */
- };
-
- /* find div (= 1/128, 1/256, 1/512, 1/1024, 1/2048 */
- for (sel = 0; sel < ARRAY_SIZE(sel_rate); sel++) {
- for (div = 128, idx = 0;
- div <= 2048;
- div *= 2, idx++) {
- if (src_rate == sel_rate[sel] / div) {
- val = (idx << 4) | sel;
- goto find_rate;
- }
- }
- }
- dev_err(dev, "can't find convert src clk\n");
- return -EINVAL;
-
-find_rate:
- shift = (id % 4) * 8;
- mask = 0xFF << shift;
- val = val << shift;
-
- dev_dbg(dev, "adg convert src clk = %02x\n", val);
-
- switch (id / 4) {
- case 0:
- rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL3, mask, val);
- break;
- case 1:
- rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL4, mask, val);
- break;
- case 2:
- rsnd_mod_bset(adg_mod, AUDIO_CLK_SEL5, mask, val);
- break;
- }
-
- /*
- * Gen1 doesn't need dst_rate settings,
- * since it uses SSI WS pin.
- * see also rsnd_src_set_route_if_gen1()
- */
-
- return 0;
-}
-
static void rsnd_adg_set_ssi_clk(struct rsnd_mod *ssi_mod, u32 val)
{
struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod);