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| author | Sébastien Szymanski <sebastien.szymanski@armadeus.com> | 2018-09-06 12:16:00 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2018-09-10 17:49:02 +0300 |
| commit | 90a3b7f8aba3011badacd6d8121e03aa24ac79d1 (patch) | |
| tree | 9a5adbe12f7e4f3bb7a7ad6298dcff262bb65cb1 /sound/soc/intel/skylake | |
| parent | 2a665dba016d5493c7d826fec82b0cb643b30d42 (diff) | |
| download | linux-90a3b7f8aba3011badacd6d8121e03aa24ac79d1.tar.xz | |
ASoC: cs4265: fix MMTLR Data switch control
The MMTLR bit is in the CS4265_SPDIF_CTL2 register at address 0x12 bit 0
and not at address 0x0 bit 1. Fix this.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
Diffstat (limited to 'sound/soc/intel/skylake')
0 files changed, 0 insertions, 0 deletions