diff options
| author | Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> | 2020-11-12 19:31:00 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-11-13 17:22:08 +0300 |
| commit | a6e9717a71fd825b6d18a532954d1f9daadcd875 (patch) | |
| tree | ecbb1c32a2782ebb63f451945979129d70bb1e11 /sound/soc/intel/keembay | |
| parent | 84b53a366ebc45027e64f2e37001e4e602a93464 (diff) | |
| download | linux-a6e9717a71fd825b6d18a532954d1f9daadcd875.tar.xz | |
ASoC: Intel: keembay: use inclusive language for bclk and fsync
Use 'clock provider' and 'clock consumer' terms.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20201112163100.5081-5-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel/keembay')
| -rw-r--r-- | sound/soc/intel/keembay/kmb_platform.c | 22 | ||||
| -rw-r--r-- | sound/soc/intel/keembay/kmb_platform.h | 8 |
2 files changed, 15 insertions, 15 deletions
diff --git a/sound/soc/intel/keembay/kmb_platform.c b/sound/soc/intel/keembay/kmb_platform.c index f54b710ee1c2..3441e69ced04 100644 --- a/sound/soc/intel/keembay/kmb_platform.c +++ b/sound/soc/intel/keembay/kmb_platform.c @@ -358,7 +358,7 @@ static void kmb_i2s_start(struct kmb_i2s_info *kmb_i2s, kmb_i2s_irq_trigger(kmb_i2s, substream->stream, config->chan_nr, true); - if (kmb_i2s->master) + if (kmb_i2s->clock_provider) writel(1, kmb_i2s->i2s_base + CER); else writel(0, kmb_i2s->i2s_base + CER); @@ -393,13 +393,13 @@ static int kmb_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) struct kmb_i2s_info *kmb_i2s = snd_soc_dai_get_drvdata(cpu_dai); int ret; - switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBM_CFM: - kmb_i2s->master = false; + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { + case SND_SOC_DAIFMT_CBP_CFP: + kmb_i2s->clock_provider = false; ret = 0; break; - case SND_SOC_DAIFMT_CBS_CFS: - writel(MASTER_MODE, kmb_i2s->pss_base + I2S_GEN_CFG_0); + case SND_SOC_DAIFMT_CBC_CFC: + writel(CLOCK_PROVIDER_MODE, kmb_i2s->pss_base + I2S_GEN_CFG_0); ret = clk_prepare_enable(kmb_i2s->clk_i2s); if (ret < 0) @@ -410,7 +410,7 @@ static int kmb_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt) if (ret) return ret; - kmb_i2s->master = true; + kmb_i2s->clock_provider = true; break; default: return -EINVAL; @@ -510,7 +510,7 @@ static int kmb_dai_hw_params(struct snd_pcm_substream *substream, * Platform is not capable of providing clocks for * multi channel audio */ - if (kmb_i2s->master) + if (kmb_i2s->clock_provider) return -EINVAL; write_val = ((config->chan_nr / 2) << TDM_CHANNEL_CONFIG_BIT) | @@ -524,12 +524,12 @@ static int kmb_dai_hw_params(struct snd_pcm_substream *substream, * Platform is only capable of providing clocks need for * 2 channel master mode */ - if (!(kmb_i2s->master)) + if (!(kmb_i2s->clock_provider)) return -EINVAL; write_val = ((config->chan_nr / 2) << TDM_CHANNEL_CONFIG_BIT) | (config->data_width << DATA_WIDTH_CONFIG_BIT) | - MASTER_MODE | I2S_OPERATION; + CLOCK_PROVIDER_MODE | I2S_OPERATION; writel(write_val, kmb_i2s->pss_base + I2S_GEN_CFG_0); break; @@ -544,7 +544,7 @@ static int kmb_dai_hw_params(struct snd_pcm_substream *substream, config->sample_rate = params_rate(hw_params); - if (kmb_i2s->master) { + if (kmb_i2s->clock_provider) { /* Only 2 ch supported in Master mode */ u32 bitclk = config->sample_rate * config->data_width * 2; diff --git a/sound/soc/intel/keembay/kmb_platform.h b/sound/soc/intel/keembay/kmb_platform.h index 9756b132c12f..0c393e5916b6 100644 --- a/sound/soc/intel/keembay/kmb_platform.h +++ b/sound/soc/intel/keembay/kmb_platform.h @@ -58,7 +58,7 @@ #define PSS_CPR_CLK_CLR 0x000 #define PSS_CPR_AUX_RST_EN 0x070 -#define MASTER_MODE BIT(13) +#define CLOCK_PROVIDER_MODE BIT(13) /* Interrupt Flag */ #define TX_INT_FLAG GENMASK(5, 4) @@ -99,8 +99,8 @@ #define DWC_I2S_PLAY BIT(0) #define DWC_I2S_RECORD BIT(1) -#define DW_I2S_SLAVE BIT(2) -#define DW_I2S_MASTER BIT(3) +#define DW_I2S_CONSUMER BIT(2) +#define DW_I2S_PROVIDER BIT(3) #define I2S_RXDMA 0x01C0 #define I2S_TXDMA 0x01C8 @@ -130,7 +130,7 @@ struct kmb_i2s_info { u32 ccr; u32 xfer_resolution; u32 fifo_th; - bool master; + bool clock_provider; struct i2s_clk_config_data config; int (*i2s_clk_cfg)(struct i2s_clk_config_data *config); |