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author | Mark Brown <broonie@kernel.org> | 2015-06-22 12:24:19 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2015-06-22 12:24:19 +0300 |
commit | 208a128f6b19eedd1819cb1b19f29dc99ca1d27e (patch) | |
tree | 5d95c61efeb06ed6ec827267bc05e89498836bec /sound/soc/fsl/fsl_spdif.c | |
parent | d21504d4c993838b31d970d392b1b78eb33cfd61 (diff) | |
parent | 11e688862c4c8162119a4ca51c3326555966c8bb (diff) | |
download | linux-208a128f6b19eedd1819cb1b19f29dc99ca1d27e.tar.xz |
Merge tag 'asoc-v4.2' into asoc-next
ASoC: Updates for v4.2
The big thing this release has been Liam's addition of topology support
to the core. We've also seen quite a bit of driver work and the
continuation of Lars' refactoring for component support.
- Support for loading ASoC topology maps from firmware, intended to be
used to allow self-describing DSP firmware images to be built which
can map controls added by the DSP to userspace without the kernel
needing to know about individual DSP firmwares.
- Lots of refactoring to avoid direct access to snd_soc_codec where
it's not needed supporting future refactoring.
- Big refactoring and cleanup serieses for the Wolfson ADSP and TI
TAS2552 drivers.
- Support for TI TAS571x power amplifiers.
- Support for Qualcomm APQ8016 and ZTE ZX296702 SoCs.
- Support for x86 systems with RT5650 and Qualcomm Storm.
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# gpg: aka "Mark Brown <broonie@kernel.org>"
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Diffstat (limited to 'sound/soc/fsl/fsl_spdif.c')
-rw-r--r-- | sound/soc/fsl/fsl_spdif.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index 91eb3aef7f02..8e932219cb3a 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -417,11 +417,9 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream, if (clk != STC_TXCLK_SPDIF_ROOT) goto clk_set_bypass; - /* - * The S/PDIF block needs a clock of 64 * fs * txclk_df. - * So request 64 * fs * (txclk_df + 1) to get rounded. - */ - ret = clk_set_rate(spdif_priv->txclk[rate], 64 * sample_rate * (txclk_df + 1)); + /* The S/PDIF block needs a clock of 64 * fs * txclk_df */ + ret = clk_set_rate(spdif_priv->txclk[rate], + 64 * sample_rate * txclk_df); if (ret) { dev_err(&pdev->dev, "failed to set tx clock rate\n"); return ret; @@ -1060,7 +1058,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv, for (sysclk_df = sysclk_dfmin; sysclk_df <= sysclk_dfmax; sysclk_df++) { for (txclk_df = 1; txclk_df <= 128; txclk_df++) { - rate_ideal = rate[index] * (txclk_df + 1) * 64; + rate_ideal = rate[index] * txclk_df * 64; if (round) rate_actual = clk_round_rate(clk, rate_ideal); else |