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author | Mark Brown <broonie@kernel.org> | 2022-11-29 15:55:12 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2022-11-29 15:55:51 +0300 |
commit | aeb2e9c4eedc6fed264a51ca2ea17c83984d2a64 (patch) | |
tree | 3d80758082c0a3bc293761cc1a4cbac2e457b128 /sound/soc/fsl/fsl_micfil.c | |
parent | 863b9179cee4570e5da4206dcf8dbcdcc37c8348 (diff) | |
parent | 3d1bb6cc1a654c8693a85b1d262e610196edec8b (diff) | |
download | linux-aeb2e9c4eedc6fed264a51ca2ea17c83984d2a64.tar.xz |
ASoC: Merge up fixes
Merge the fixes branch up so we can apply further AMD work.
Diffstat (limited to 'sound/soc/fsl/fsl_micfil.c')
-rw-r--r-- | sound/soc/fsl/fsl_micfil.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c index 22e75c14cac4..7b17f152bbf3 100644 --- a/sound/soc/fsl/fsl_micfil.c +++ b/sound/soc/fsl/fsl_micfil.c @@ -376,6 +376,25 @@ static int fsl_micfil_reset(struct device *dev) if (ret) return ret; + /* + * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined + * as non-volatile register, so SRES still remain in regmap + * cache after set, that every update of REG_MICFIL_CTRL1, + * software reset happens. so clear it explicitly. + */ + ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, + MICFIL_CTRL1_SRES); + if (ret) + return ret; + + /* + * Set SRES should clear CHnF flags, But even add delay here + * the CHnF may not be cleared sometimes, so clear CHnF explicitly. + */ + ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); + if (ret) + return ret; + return 0; } |