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| author | Takashi Iwai <tiwai@suse.de> | 2015-12-10 18:49:36 +0300 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2015-12-15 16:04:05 +0300 |
| commit | 2cf721db4b78c11cb57d5a30888eb25ca04d9a29 (patch) | |
| tree | 989192adfc9b58456c1ffc28831a8c15f5ce2e95 /sound/pci | |
| parent | 4f0189be3d0b2ba7f23b46295e4063fa3298aa74 (diff) | |
| download | linux-2cf721db4b78c11cb57d5a30888eb25ca04d9a29.tar.xz | |
ALSA: hda - Increase default bdl_pos_adj for Baytrail/Braswell
Intel Atom processors seem to have a problem at recording when
bdl_pos_adj is set to an odd value. When a value like 1 is used, it
may drop the samples unexpectedly. Actually, for the old Atoms, we
used to set AZX_DRIVER_SCH type, and this assigns 32 as default.
Meanwhile the newer chips, Baytrail and Braswell, are set as
AZX_DRIVER_PCH, and the lower default value, 1, is assigned.
This patch changes the default values for these chipsets to a safer
default, 32, again. Since changing the driver type (AZX_DRIVER_XXX)
leads to the rename of the driver string, it would result in a
possible regression. So, we can't change the type. Instead, in this
patch, manual (ugly) PCI ID checks are added on top.
A drawback by this increase is the slight increase of the latency, but
it's a sub-ms order in normal situations, so mostly negligible.
Reported-and-tested-by: Jochen Henneberg <jh@henneberg-systemdesign.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci')
| -rw-r--r-- | sound/pci/hda/hda_intel.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index a17bf0467edc..56ef6b6fb546 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -1490,6 +1490,15 @@ static void azx_probe_work(struct work_struct *work) static int default_bdl_pos_adj(struct azx *chip) { + /* some exceptions: Atoms seem problematic with value 1 */ + if (chip->pci->vendor == PCI_VENDOR_ID_INTEL) { + switch (chip->pci->device) { + case 0x0f04: /* Baytrail */ + case 0x2284: /* Braswell */ + return 32; + } + } + switch (chip->driver_type) { case AZX_DRIVER_ICH: case AZX_DRIVER_PCH: |