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| author | James Hogan <james.hogan@imgtec.com> | 2015-05-19 11:50:30 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-06-21 22:52:28 +0300 |
| commit | e50f0e313548854c2709a5ba9c61623cf189a9a1 (patch) | |
| tree | 4351ce6fbf13928eedbe28a623b70adce826c827 /security | |
| parent | d1e9a4f547354ca258b6200ab6b1f0e4909b92e8 (diff) | |
| download | linux-e50f0e313548854c2709a5ba9c61623cf189a9a1.tar.xz | |
MIPS: hazards: Add hazard macros for tlb read
Add hazard macros to <asm/hazards.h> for the following hazards around
tlbr (TLB read) instructions, which are used in TLB dumping code and
some KVM TLB management code:
- mtc0_tlbr_hazard
Between mtc0 (Index) and tlbr. This is copied from mtc0_tlbw_hazard in
all cases on the assumption that tlbr always has similar data user
timings to tlbw.
- tlb_read_hazard
Between tlbr and mfc0 (various TLB registers). This is copied from
tlbw_use_hazard in all cases on the assumption that tlbr has similar
data writer characteristics to tlbw, and mfc0 has similar data user
characteristics to loads and stores.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10078/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'security')
0 files changed, 0 insertions, 0 deletions