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| author | Cyril Bur <cyrilbur@tenstorrent.com> | 2025-06-02 15:15:43 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-07-06 12:04:25 +0300 |
| commit | 9366a1273f7e08186acbe8f21787a55af83f3d62 (patch) | |
| tree | 62666e793644f5b5a88428c7b6ec3d71ab3880d3 /scripts | |
| parent | 3ff0a89be94465f6ccde2130277c9736241a2891 (diff) | |
| download | linux-9366a1273f7e08186acbe8f21787a55af83f3d62.tar.xz | |
riscv: uaccess: Only restore the CSR_STATUS SUM bit
commit 265d6aba165c500389c80d394ac247460c443ef5 upstream.
During switch to csrs will OR the value of the register into the
corresponding csr. In this case we're only interested in restoring the
SUM bit not the entire register.
Signed-off-by: Cyril Bur <cyrilbur@tenstorrent.com>
Link: https://lore.kernel.org/r/20250522160954.429333-1-cyrilbur@tenstorrent.com
Co-developed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Fixes: 788aa64c01f1 ("riscv: save the SR_SUM status over switches")
Link: https://lore.kernel.org/r/20250602121543.1544278-1-alexghiti@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions