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authorLeo Li <sunpeng.li@amd.com>2024-12-09 20:58:33 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-01-23 19:23:05 +0300
commitf6be6248d6490be9d9e476d4036e77bf42e3c10e (patch)
tree85f8420cd2255450f45f49e3f1f03b04e828f1c8 /scripts/generate_rust_analyzer.py
parent0f0c5ca1863e0cc7fe32ada6e78ac781be8ff377 (diff)
downloadlinux-f6be6248d6490be9d9e476d4036e77bf42e3c10e.tar.xz
drm/amd/display: Do not wait for PSR disable on vbl enable
commit ff2e4d874726c549130308b6b46aa0f8a34e04cb upstream. [Why] Outside of a modeset/link configuration change, we should not have to wait for the panel to exit PSR. Depending on the panel and it's state, it may take multiple frames for it to exit PSR. Therefore, waiting in all scenarios may cause perceived stuttering, especially in combination with faster vblank shutdown. [How] PSR1 disable is hooked up to the vblank enable event, and vice versa. In case of vblank enable, do not wait for panel to exit PSR, but still wait in all other cases. We also avoid a call to unnecessarily change power_opts on disable - this ends up sending another command to dmcub fw. When testing against IGT, some crc tests like kms_plane_alpha_blend and amd_hotplug were failing due to CRC timeouts. This was found to be caused by the early return before HW has fully exited PSR1. Fix this by first making sure we grab a vblank reference, then waiting for panel to exit PSR1, before programming hw for CRC generation. Fixes: 58a261bfc967 ("drm/amd/display: use a more lax vblank enable policy for older ASICs") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3743 Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit aa6713fa2046f4c09bf3013dd1420ae15603ca6f) Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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