diff options
| author | Ovidiu Bunea <Ovidiu.Bunea@amd.com> | 2024-11-07 00:25:18 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-12-09 12:41:16 +0300 |
| commit | bf078ed5daa3c851c50c8debcf0426d06d2faddb (patch) | |
| tree | ed8b2844584ae3b8294ff215302e415d2fb908e3 /scripts/generate_rust_analyzer.py | |
| parent | ca99829773255d8398d095ab15f6a26014220bb9 (diff) | |
| download | linux-bf078ed5daa3c851c50c8debcf0426d06d2faddb.tar.xz | |
drm/amd/display: Remove PIPE_DTO_SRC_SEL programming from set_dtbclk_dto
commit a3e6079bd93d5c66a43bf6a5f90e5b98465dc7b3 upstream.
There are cases where an OTG is remapped from driving a regular HDMI
display to a DP/eDP display. There are also cases where DTBCLK needs to
be enabled for HPO, but DTBCLK DTO programming may be done while OTG is
still enabled which is dangerous as the PIPE_DTO_SRC_SEL programming may
change the pixel clock generator source for a mapped and running OTG and
cause it to hang.
Remove the PIPE_DTO_SRC_SEL programming from this sequence since it is
already done in program_pixel_clk(). Additionally, make sure that
program_pixel_clk sets DTBCLK DTO as source for special HDMI cases.
Cc: stable@vger.kernel.org # 6.11+
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Ovidiu Bunea <Ovidiu.Bunea@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions