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| author | Aric Cyr <Aric.Cyr@amd.com> | 2025-01-09 23:03:48 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-02-08 11:58:19 +0300 |
| commit | 8eb4d51b44c7f79e27bef8dbb4f1f068c10396f4 (patch) | |
| tree | c33f90d19c7c2f6ed106649dab52e186dd82d7b5 /scripts/generate_rust_analyzer.py | |
| parent | 593d852f7fe21a225df4866799b6b539de6b8255 (diff) | |
| download | linux-8eb4d51b44c7f79e27bef8dbb4f1f068c10396f4.tar.xz | |
drm/amd/display: Add hubp cache reset when powergating
commit 01130f5260e5868fb6b15ab8c00dbc894139f48e upstream.
[Why]
When HUBP is power gated, the SW state can get out of sync with the
hardware state causing cursor to not be programmed correctly.
[How]
Similar to DPP, add a HUBP reset function which is called wherever
HUBP is initialized or powergated. This function will clear the cursor
position and attribute cache allowing for proper programming when the
HUBP is brought back up.
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Sung Lee <sung.lee@amd.com>
Signed-off-by: Aric Cyr <Aric.Cyr@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions