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| author | Aapo Vienamo <aapo.vienamo@linux.intel.com> | 2024-06-20 13:43:03 +0300 |
|---|---|---|
| committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2024-08-02 09:59:51 +0300 |
| commit | ab3de2c7ec91db6a3cf5fc07765852c81ca7d6ef (patch) | |
| tree | 46a47134d5d6a6e8d458812dce935d6b268a82a4 /scripts/gdb/linux/utils.py | |
| parent | 8400291e289ee6b2bf9779ff1c83a291501f017b (diff) | |
| download | linux-ab3de2c7ec91db6a3cf5fc07765852c81ca7d6ef.tar.xz | |
thunderbolt: Fix memory leaks in {port|retimer}_sb_regs_write()
Add missing free_page() call for the memory allocated by
validate_and_copy_from_user().
Fixes: 6d241fa00159 ("thunderbolt: Add sideband register access to debugfs")
Signed-off-by: Aapo Vienamo <aapo.vienamo@linux.intel.com>
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions