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| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2022-06-04 02:34:37 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-06-13 12:53:18 +0300 |
| commit | 75fe45a000a70ea35e2071eb7f8b873648590982 (patch) | |
| tree | 51cd50c41ab168aa00116aa566f772664889518c /net | |
| parent | 61a6737fcad8810258bdf1329f063b58ac27b230 (diff) | |
| download | linux-75fe45a000a70ea35e2071eb7f8b873648590982.tar.xz | |
clk: renesas: r8a779f0: Add SDHI0 clock
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220603233437.21819-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions