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authorStafford Horne <shorne@gmail.com>2025-01-14 20:07:21 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-03-07 20:25:44 +0300
commitec9acbab2ea787ef45e46679c62b656912c605b5 (patch)
tree277cf901e73c3a8b64bc6c0155952defe8dd7406 /net/lapb/lapb_timer.c
parent59455f968c1004ed897ba873237657745d81ce0f (diff)
downloadlinux-ec9acbab2ea787ef45e46679c62b656912c605b5.tar.xz
rseq/selftests: Fix riscv rseq_offset_deref_addv inline asm
commit 713e788c0e07e185fd44dd581f74855ef149722f upstream. When working on OpenRISC support for restartable sequences I noticed and fixed these two issues with the riscv support bits. 1 The 'inc' argument to RSEQ_ASM_OP_R_DEREF_ADDV was being implicitly passed to the macro. Fix this by adding 'inc' to the list of macro arguments. 2 The inline asm input constraints for 'inc' and 'off' use "er", The riscv gcc port does not have an "e" constraint, this looks to be copied from the x86 port. Fix this by just using an "r" constraint. I have compile tested this only for riscv. However, the same fixes I use in the OpenRISC rseq selftests and everything passes with no issues. Fixes: 171586a6ab66 ("selftests/rseq: riscv: Template memory ordering and percpu access mode") Signed-off-by: Stafford Horne <shorne@gmail.com> Tested-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Acked-by: Shuah Khan <skhan@linuxfoundation.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250114170721.3613280-1-shorne@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'net/lapb/lapb_timer.c')
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