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authorXing Zheng <zhengxing@rock-chips.com>2016-06-30 05:18:59 +0300
committerHeiko Stuebner <heiko@sntech.de>2016-07-01 02:50:17 +0300
commit3770821fa360525e6c726cd562a2438a0aa5d566 (patch)
treeec494e523c723b6a1adbe00d46b2584c3321a897 /mm
parent6e3732a2bebc3f08a59d2eafc2aa613b92055e3f (diff)
downloadlinux-3770821fa360525e6c726cd562a2438a0aa5d566.tar.xz
clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits
The CLKSEL_CON32 bit_0 is controlled for spdif_8ch, not spdif_rec_dptx, it should be bit_8, let's fix it. Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399") Reported-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Cc: stable@vger.kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions