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authorStefan Agner <stefan@agner.ch>2014-03-06 02:11:08 +0400
committerThomas Gleixner <tglx@linutronix.de>2014-03-06 14:34:14 +0400
commit224aa3ed45c8735ae02bb2ecca002409fa6aa772 (patch)
tree54f6838a6650e1ba3eb2dc6776818e2749031d20 /mm/mprotect.c
parent0414855fdc4a40da05221fc6062cccbc0c30f169 (diff)
downloadlinux-224aa3ed45c8735ae02bb2ecca002409fa6aa772.tar.xz
clocksource: vf_pit_timer: use complement for sched_clock reading
Vybrids PIT register is monitonic decreasing. However, sched_clock reading needs to be monitonic increasing. Use bitwise not to get the complement of the clock register. This fixes the clock going backward. Also, the clock now starts at 0 since we load the register with the maximum value at start. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: daniel.lezcano@linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Link: http://lkml.kernel.org/r/d25af915993aec1b486be653eb86f748ddef54fe.1394057313.git.stefan@agner.ch Cc: stable@vger.kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'mm/mprotect.c')
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