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| author | Ben Widawsky <ben.widawsky@intel.com> | 2022-01-24 03:29:53 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-02-09 09:57:29 +0300 |
| commit | 53fa1bff3426344d466d91e81f076eab677d0ece (patch) | |
| tree | e29317f8652ba42a4da2a3b98d90c11d6b65865c /lib | |
| parent | d2b61ed2ff63fd9f294db8399c7a680ea7fe8a23 (diff) | |
| download | linux-53fa1bff3426344d466d91e81f076eab677d0ece.tar.xz | |
cxl/core: Track port depth
In preparation for proving CXL subsystem usage of the device_lock()
order track the depth of ports with the expectation that shallower port
locks can be held over deeper port locks.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164298419321.3018233.4469731547378993606.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions