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authorMario Limonciello <mario.limonciello@amd.com>2023-07-08 05:26:09 +0300
committerAlex Deucher <alexander.deucher@amd.com>2023-07-12 19:21:23 +0300
commite701156ccc6c7a5f104a968dda74cd6434178712 (patch)
tree90957b7750554df5d33fde75fb1483f6ab60a924 /lib/locking-selftest-wlock-hardirq.h
parent188623076d0f1a500583d392b6187056bf7cc71a (diff)
downloadlinux-e701156ccc6c7a5f104a968dda74cd6434178712.tar.xz
drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13
SMU13 overrides dynamic PCIe lane width and dynamic speed by when on certain hosts. commit 38e4ced80479 ("drm/amd/pm: conditionally disable pcie lane switching for some sienna_cichlid SKUs") worked around this issue by setting up certain SKUs to set up certain limits, but the same fundamental problem with those hosts affects all SMU11 implmentations as well, so align the SMU11 and SMU13 driver handling. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.1.x
Diffstat (limited to 'lib/locking-selftest-wlock-hardirq.h')
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