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| author | Addy Ke <addy.ke@rock-chips.com> | 2014-07-31 10:01:38 +0400 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2014-09-09 15:58:59 +0400 |
| commit | f629ba2c04c949aa62c85b48c0b73b915b98defc (patch) | |
| tree | a96d3041262eb032c00bb329cf55f78f864301cf /lib/jedec_ddr_data.c | |
| parent | 8ca28610e5e37193cd61fefa4310941e28de10ca (diff) | |
| download | linux-f629ba2c04c949aa62c85b48c0b73b915b98defc.tar.xz | |
mmc: dw_mmc: add support for RK3288
This patch focuses on clock setting for RK3288 mmc controller.
In RK3288 mmc controller, CLKDIV register can only be set 0 or 1,
and if DDR 8bit mode, CLKDIV register must be set 1.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'lib/jedec_ddr_data.c')
0 files changed, 0 insertions, 0 deletions