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| author | Florian Fainelli <florian@openwrt.org> | 2012-01-31 21:18:45 +0400 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2012-08-23 01:46:38 +0400 |
| commit | 62cedc4fde2d15b08e4502aa3fb2d9d798f3ccd8 (patch) | |
| tree | fee5a50adcb7181d44bf4f3364d46883bc49dd35 /ipc | |
| parent | 91405eb69ee007ee854aa917e2a15e6ccede2cd1 (diff) | |
| download | linux-62cedc4fde2d15b08e4502aa3fb2d9d798f3ccd8.tar.xz | |
MIPS: introduce CPU_R4K_CACHE_TLB
R4K-style CPUs having common code to support their caches and tlb have this
boolean defined by default. Allows us to remove some lines in
arch/mips/mm/Makefile.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/3328/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'ipc')
0 files changed, 0 insertions, 0 deletions