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authorMengdong Lin <mengdong.lin@intel.com>2014-07-03 13:02:23 +0400
committerTakashi Iwai <tiwai@suse.de>2014-07-04 09:47:22 +0400
commite4d9e513dedb5ac4e166c1053314fa935ddecc8c (patch)
tree7c5159dd08ef78189302ef7669ddd532b6dd09cc /init/do_mounts_initrd.c
parentc149dcb5c60bfea8871f16dfcc0690255eeb825f (diff)
downloadlinux-e4d9e513dedb5ac4e166c1053314fa935ddecc8c.tar.xz
ALSA: hda - restore BCLK M/N value as per CDCLK for HSW/BDW display HDA controller
For HSW/BDW display HD-A controller, hda_set_bclk() is defined to set BCLK by programming the M/N values as per the core display clock (CDCLK) queried from i915 display driver. And the audio driver will also set BCLK in azx_first_init() since the display driver can turn off the shared power in boot phase if only eDP is connected and M/N values will be lost and must be reprogrammed. Signed-off-by: Mengdong Lin <mengdong.lin@intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'init/do_mounts_initrd.c')
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