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authorArnd Bergmann <arnd@arndb.de>2022-09-23 18:40:27 +0300
committerArnd Bergmann <arnd@arndb.de>2022-09-23 18:40:27 +0300
commit37d49c249cb8f9da6675cb23534c3ca478ffd3a4 (patch)
treeab5a8980175f16f3176244be1df81793d23d1fb1 /include
parentb49aae5e9493e5eea85346dfa4294f16d396f30d (diff)
parentdf646a17f103c6f18ab85c5e3773763d18dc528b (diff)
downloadlinux-37d49c249cb8f9da6675cb23534c3ca478ffd3a4.tar.xz
Merge tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for 6.1 The icc-bwmon driver is expected to support measuring LLCC/DDR bandwidth on SDM845 and SC7280. The LLCC driver is extended to provide per-platform register mappings to the LLCC EDAC driver. The QMI encoder/decoder is updated to allow the passed qmi_elem_info to be const. Support for SDM845 is added to the sleep stats driver. Power-domains for the SM6375 platform is added to RPMPD and the platform is added to socinfo, together with the PM6125 pmic id. A couple of of_node reference issues are corrected in the smem state and smsm drivers. The Qualcomm SCM driver binding is converted to YAML. * tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (29 commits) soc: qcom: rpmpd: Add SM6375 support dt-bindings: power: rpmpd: Add SM6375 power domains firmware: qcom: scm: remove unused __qcom_scm_init declaration dt-bindings: power: qcom,rpmpd: drop non-working codeaurora.org emails soc: qcom: icc-bwmon: force clear counter/irq registers soc: qcom: icc-bwmon: add support for sc7280 LLCC BWMON dt-bindings: interconnect: qcom,msm8998-bwmon: Add support for sc7280 BWMONs soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver soc: qcom: llcc: Rename reg_offset structs to reflect LLCC version soc: qcom: qmi: use const for struct qmi_elem_info soc: qcom: icc-bwmon: remove redundant ret variable dt-bindings: soc: qcom: stats: Document SDM845 compatible soc: qcom: stats: Add SDM845 stats config and compatible dt-bindings: firmware: document Qualcomm SM6115 SCM soc: qcom: Make QCOM_RPMPD depend on OF dt-bindings: firmware: convert Qualcomm SCM binding to the yaml soc: qcom: socinfo: Add PM6125 ID soc: qcom: socinfo: Add an ID for SM6375 soc: qcom: smem_state: Add refcounting for the 'state->of_node' soc: qcom: smsm: Fix refcount leak bugs in qcom_smsm_probe() ... Link: https://lore.kernel.org/r/20220921155753.1316308-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/power/qcom-rpmpd.h12
-rw-r--r--include/linux/soc/qcom/llcc-qcom.h30
-rw-r--r--include/linux/soc/qcom/qmi.h20
3 files changed, 52 insertions, 10 deletions
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
index d81de63ae31c..f5f82dde7399 100644
--- a/include/dt-bindings/power/qcom-rpmpd.h
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -36,6 +36,18 @@
#define SM6350_MSS 4
#define SM6350_MX 5
+/* SM6350 Power Domain Indexes */
+#define SM6375_VDDCX 0
+#define SM6375_VDDCX_AO 1
+#define SM6375_VDDCX_VFL 2
+#define SM6375_VDDMX 3
+#define SM6375_VDDMX_AO 4
+#define SM6375_VDDMX_VFL 5
+#define SM6375_VDDGX 6
+#define SM6375_VDDGX_AO 7
+#define SM6375_VDD_LPI_CX 8
+#define SM6375_VDD_LPI_MX 9
+
/* SM8150 Power Domain Indexes */
#define SM8150_MSS 0
#define SM8150_EBI 1
diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
index 9ed5384c5ca1..bc2fb8343a94 100644
--- a/include/linux/soc/qcom/llcc-qcom.h
+++ b/include/linux/soc/qcom/llcc-qcom.h
@@ -78,11 +78,40 @@ struct llcc_edac_reg_data {
u8 ways_shift;
};
+struct llcc_edac_reg_offset {
+ /* LLCC TRP registers */
+ u32 trp_ecc_error_status0;
+ u32 trp_ecc_error_status1;
+ u32 trp_ecc_sb_err_syn0;
+ u32 trp_ecc_db_err_syn0;
+ u32 trp_ecc_error_cntr_clear;
+ u32 trp_interrupt_0_status;
+ u32 trp_interrupt_0_clear;
+ u32 trp_interrupt_0_enable;
+
+ /* LLCC Common registers */
+ u32 cmn_status0;
+ u32 cmn_interrupt_0_enable;
+ u32 cmn_interrupt_2_enable;
+
+ /* LLCC DRP registers */
+ u32 drp_ecc_error_cfg;
+ u32 drp_ecc_error_cntr_clear;
+ u32 drp_interrupt_status;
+ u32 drp_interrupt_clear;
+ u32 drp_interrupt_enable;
+ u32 drp_ecc_error_status0;
+ u32 drp_ecc_error_status1;
+ u32 drp_ecc_sb_err_syn0;
+ u32 drp_ecc_db_err_syn0;
+};
+
/**
* struct llcc_drv_data - Data associated with the llcc driver
* @regmap: regmap associated with the llcc device
* @bcast_regmap: regmap associated with llcc broadcast offset
* @cfg: pointer to the data structure for slice configuration
+ * @edac_reg_offset: Offset of the LLCC EDAC registers
* @lock: mutex associated with each slice
* @cfg_size: size of the config data table
* @max_slices: max slices as read from device tree
@@ -96,6 +125,7 @@ struct llcc_drv_data {
struct regmap *regmap;
struct regmap *bcast_regmap;
const struct llcc_slice_config *cfg;
+ const struct llcc_edac_reg_offset *edac_reg_offset;
struct mutex lock;
u32 cfg_size;
u32 max_slices;
diff --git a/include/linux/soc/qcom/qmi.h b/include/linux/soc/qcom/qmi.h
index b1f80e756d2a..469e02d2aa0d 100644
--- a/include/linux/soc/qcom/qmi.h
+++ b/include/linux/soc/qcom/qmi.h
@@ -75,7 +75,7 @@ struct qmi_elem_info {
enum qmi_array_type array_type;
u8 tlv_type;
u32 offset;
- struct qmi_elem_info *ei_array;
+ const struct qmi_elem_info *ei_array;
};
#define QMI_RESULT_SUCCESS_V01 0
@@ -102,7 +102,7 @@ struct qmi_response_type_v01 {
u16 error;
};
-extern struct qmi_elem_info qmi_response_type_v01_ei[];
+extern const struct qmi_elem_info qmi_response_type_v01_ei[];
/**
* struct qmi_service - context to track lookup-results
@@ -173,7 +173,7 @@ struct qmi_txn {
struct completion completion;
int result;
- struct qmi_elem_info *ei;
+ const struct qmi_elem_info *ei;
void *dest;
};
@@ -189,7 +189,7 @@ struct qmi_msg_handler {
unsigned int type;
unsigned int msg_id;
- struct qmi_elem_info *ei;
+ const struct qmi_elem_info *ei;
size_t decoded_size;
void (*fn)(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
@@ -249,23 +249,23 @@ void qmi_handle_release(struct qmi_handle *qmi);
ssize_t qmi_send_request(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
struct qmi_txn *txn, int msg_id, size_t len,
- struct qmi_elem_info *ei, const void *c_struct);
+ const struct qmi_elem_info *ei, const void *c_struct);
ssize_t qmi_send_response(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
struct qmi_txn *txn, int msg_id, size_t len,
- struct qmi_elem_info *ei, const void *c_struct);
+ const struct qmi_elem_info *ei, const void *c_struct);
ssize_t qmi_send_indication(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
- int msg_id, size_t len, struct qmi_elem_info *ei,
+ int msg_id, size_t len, const struct qmi_elem_info *ei,
const void *c_struct);
void *qmi_encode_message(int type, unsigned int msg_id, size_t *len,
- unsigned int txn_id, struct qmi_elem_info *ei,
+ unsigned int txn_id, const struct qmi_elem_info *ei,
const void *c_struct);
int qmi_decode_message(const void *buf, size_t len,
- struct qmi_elem_info *ei, void *c_struct);
+ const struct qmi_elem_info *ei, void *c_struct);
int qmi_txn_init(struct qmi_handle *qmi, struct qmi_txn *txn,
- struct qmi_elem_info *ei, void *c_struct);
+ const struct qmi_elem_info *ei, void *c_struct);
int qmi_txn_wait(struct qmi_txn *txn, unsigned long timeout);
void qmi_txn_cancel(struct qmi_txn *txn);