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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2005-11-03 23:32:45 +0300 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-11-03 23:32:45 +0300 |
| commit | 7e5e6e9a509c4ed2973a345ec7ffb96577f42e26 (patch) | |
| tree | 26a9f2ae9b890a755585c83d27078d3682ff65ac /include | |
| parent | 4a5f79e7e65d24d2fa9eb6e6208672571704d337 (diff) | |
| download | linux-7e5e6e9a509c4ed2973a345ec7ffb96577f42e26.tar.xz | |
[ARM SMP] Do not clear cpu_vm_mask for VIPT caches
Since we do not invalidate TLBs/caches on MM switches, we should not
clear the cpu_vm_mask for the CPU.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/mmu_context.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h index 4af9c411c617..57b8def83d41 100644 --- a/include/asm-arm/mmu_context.h +++ b/include/asm-arm/mmu_context.h @@ -86,7 +86,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, cpu_set(cpu, next->cpu_vm_mask); check_context(next); cpu_switch_mm(next->pgd, next); - cpu_clear(cpu, prev->cpu_vm_mask); + if (cache_is_vivt()) + cpu_clear(cpu, prev->cpu_vm_mask); } } |