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authorMichel Thierry <michel.thierry@intel.com>2015-09-30 17:36:19 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-10-19 12:43:48 +0300
commit1f9a99e0e75f29776d6f4062a03edc5e41c60596 (patch)
tree673f46ef3eb076a239ec306e4b3e37e03d445c30 /include
parent6173ee2886ca46e00ba3d8f0b4a9a1cd6f8a76ce (diff)
downloadlinux-1f9a99e0e75f29776d6f4062a03edc5e41c60596.tar.xz
drm/i915/gen8: Flip the 48b switch
Use 48b addresses if hw supports it (i915.enable_ppgtt=3). Update the sanitize_enable_ppgtt for 48 bit PPGTT mode. Note, aliasing PPGTT remains 32b only. v2: s/full_64b/full_48b/. (Akash) v3: Add sanitize_enable_ppgtt changes until here. (Akash) v4: Update param description (Chris) Cc: Akash Goel <akash.goel@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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