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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-12 23:04:11 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-03-12 23:04:11 +0300 |
commit | 299601cfc0aabbabf82fca50652b7290cce7eb00 (patch) | |
tree | b9fceb84ddbb8888f3b980939cf1a8a39579c5ae /include | |
parent | 0509ad5e1a7d9220f09edd5be114bf3bd51a7023 (diff) | |
parent | 69e634f1e27c8e5b954ea4be2d05dd744cabc0bc (diff) | |
download | linux-299601cfc0aabbabf82fca50652b7290cce7eb00.tar.xz |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Clocksource: Only install r4k counter as clocksource if present.
[MIPS] Lasat: fix LASAT_CASCADE_IRQ
[MIPS] Delete leftovers of old pcspeaker support.
[MIPS] BCM1480: Init pci controller io_map_base
[MIPS] Yosemite: Fix a few more section reference bugs.
[MIPS] Fix yosemite build error
[MIPS] Fix loads of section missmatches
[MIPS] IP27: Tighten up CPU description to fix warnings.
[MIPS] Fix plat_ioremap for JMR3927
[MIPS] Export __ucmpdi2 to modules.
[MIPS] Fix typo in comment
[MIPS] Use KBUILD_DEFCONFIG
[MIPS] Allow 48Hz to be selected if CONFIG_SYS_SUPPORTS_ARBIT_HZ is set.
[MIPS] Added missing cases for rdhwr emulation
[MIPS] Alchemy: Fix ids in Alchemy db dma device table
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/cacheflush.h | 2 | ||||
-rw-r--r-- | include/asm-mips/highmem.h | 1 | ||||
-rw-r--r-- | include/asm-mips/mach-ip27/cpu-feature-overrides.h | 4 | ||||
-rw-r--r-- | include/asm-mips/mach-jmr3927/ioremap.h | 2 | ||||
-rw-r--r-- | include/asm-mips/mach-lasat/irq.h | 2 | ||||
-rw-r--r-- | include/asm-mips/pgtable-32.h | 2 | ||||
-rw-r--r-- | include/asm-mips/time.h | 5 |
7 files changed, 12 insertions, 6 deletions
diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h index 4933b4947ed0..01e7eadc97e2 100644 --- a/include/asm-mips/cacheflush.h +++ b/include/asm-mips/cacheflush.h @@ -93,7 +93,7 @@ extern void (*flush_data_cache_page)(unsigned long addr); clear_bit(PG_dcache_dirty, &(page)->flags) /* Run kernel code uncached, useful for cache probing functions. */ -unsigned long __init run_uncached(void *func); +unsigned long run_uncached(void *func); extern void *kmap_coherent(struct page *page, unsigned long addr); extern void kunmap_coherent(void); diff --git a/include/asm-mips/highmem.h b/include/asm-mips/highmem.h index 4d6bd5c31c7b..4374ab2adc75 100644 --- a/include/asm-mips/highmem.h +++ b/include/asm-mips/highmem.h @@ -39,7 +39,6 @@ extern pte_t *pkmap_page_table; * easily, subsequent pte tables have to be allocated in one physical * chunk of RAM. */ -#define PKMAP_BASE (0xfe000000UL) #define LAST_PKMAP 1024 #define LAST_PKMAP_MASK (LAST_PKMAP-1) #define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT) diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h index fe076380c189..7d3112b148d9 100644 --- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h @@ -34,7 +34,11 @@ #define cpu_has_64bits 1 #define cpu_has_4kex 1 +#define cpu_has_3k_cache 0 +#define cpu_has_6k_cache 0 #define cpu_has_4k_cache 1 +#define cpu_has_8k_cache 0 +#define cpu_has_tx39_cache 0 #define cpu_has_inclusive_pcaches 1 diff --git a/include/asm-mips/mach-jmr3927/ioremap.h b/include/asm-mips/mach-jmr3927/ioremap.h index aa131ad7f717..29989ff10d66 100644 --- a/include/asm-mips/mach-jmr3927/ioremap.h +++ b/include/asm-mips/mach-jmr3927/ioremap.h @@ -25,7 +25,7 @@ static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, { #define TXX9_DIRECTMAP_BASE 0xff000000ul if (offset >= TXX9_DIRECTMAP_BASE && - offset < TXX9_DIRECTMAP_BASE + 0xf0000) + offset < TXX9_DIRECTMAP_BASE + 0xff0000) return (void __iomem *)offset; return NULL; } diff --git a/include/asm-mips/mach-lasat/irq.h b/include/asm-mips/mach-lasat/irq.h index da75f89f3723..3a282419d5f9 100644 --- a/include/asm-mips/mach-lasat/irq.h +++ b/include/asm-mips/mach-lasat/irq.h @@ -1,7 +1,7 @@ #ifndef _ASM_MACH_LASAT_IRQ_H #define _ASM_MACH_LASAT_IRQ_H -#define LASAT_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 0) +#define LASAT_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 2) #define LASAT_IRQ_BASE 8 #define LASAT_IRQ_END 23 diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h index a0947092d0e0..ceefe027c761 100644 --- a/include/asm-mips/pgtable-32.h +++ b/include/asm-mips/pgtable-32.h @@ -65,6 +65,8 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1, #define VMALLOC_START MAP_BASE +#define PKMAP_BASE (0xfe000000UL) + #ifdef CONFIG_HIGHMEM # define VMALLOC_END (PKMAP_BASE-2*PAGE_SIZE) #else diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h index a8fd16e1981f..d3bd5c5aa2ec 100644 --- a/include/asm-mips/time.h +++ b/include/asm-mips/time.h @@ -64,10 +64,11 @@ static inline int mips_clockevent_init(void) * Initialize the count register as a clocksource */ #ifdef CONFIG_CEVT_R4K -extern void init_mips_clocksource(void); +extern int init_mips_clocksource(void); #else -static inline void init_mips_clocksource(void) +static inline int init_mips_clocksource(void) { + return 0; } #endif |