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authorEric Auger <eric.auger@redhat.com>2017-05-04 12:19:52 +0300
committerChristoffer Dall <cdall@linaro.org>2017-05-08 15:35:59 +0300
commit44de9d683847ba6dbac290bb8c9f1b773cbda746 (patch)
treebce1559ad4601adadc909f2b69e8f9c8a0c307e3 /include
parent07a3e9a7b8d2c5b0fa59b281f4480711bea8fa2b (diff)
downloadlinux-44de9d683847ba6dbac290bb8c9f1b773cbda746.tar.xz
KVM: arm64: vgic-v3: vgic_v3_lpi_sync_pending_status
this new helper synchronizes the irq pending_latch with the LPI pending bit status found in rdist pending table. As the status is consumed, we reset the bit in pending table. As we need the PENDBASER_ADDRESS() in vgic-v3, let's move its definition in the irqchip header. We restore the full length of the field, ie [51:16]. Same for PROPBASER_ADDRESS with full field length of [51:12]. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <cdall@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/irqchip/arm-gic-v3.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index be8bad00c419..fffb91202bc9 100644
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -159,6 +159,8 @@
#define GICR_PROPBASER_RaWaWb GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWaWb)
#define GICR_PROPBASER_IDBITS_MASK (0x1f)
+#define GICR_PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 12))
+#define GICR_PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(51, 16))
#define GICR_PENDBASER_SHAREABILITY_SHIFT (10)
#define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT (7)