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authorThomas Gleixner <tglx@linutronix.de>2011-02-08 19:11:03 +0300
committerThomas Gleixner <tglx@linutronix.de>2011-02-19 14:58:20 +0300
commita005677b3dd05decdd8880cf3044ae709856f58f (patch)
tree529d1454940fe8c6723bd54f01e009d9be2ab840 /include
parent1ce6068dac1924f7095be5850481e790cbf1b3c1 (diff)
downloadlinux-a005677b3dd05decdd8880cf3044ae709856f58f.tar.xz
genirq: Mirror IRQ_PER_CPU and IRQ_NO_BALANCING in irq_data.state
That's the right data structure to look at for arch code. Accessor functions are provided. irqd_is_per_cpu(irqdata); irqd_can_balance(irqdata); Coders who access them directly will be tracked down and slapped with stinking trouts. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/linux/irq.h16
1 files changed, 15 insertions, 1 deletions
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 3f607ad94220..d5312e6fe1aa 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -132,10 +132,14 @@ struct irq_data {
* Bit masks for irq_data.state
*
* IRQD_SETAFFINITY_PENDING - Affinity setting is pending
+ * IRQD_NO_BALANCING - Balancing disabled for this IRQ
+ * IRQD_PER_CPU - Interrupt is per cpu
*/
enum {
/* Bit 0 - 7 reserved for TYPE will use later */
- IRQD_SETAFFINITY_PENDING = (1 << 8),
+ IRQD_SETAFFINITY_PENDING = (1 << 8),
+ IRQD_NO_BALANCING = (1 << 10),
+ IRQD_PER_CPU = (1 << 11),
};
static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
@@ -143,6 +147,16 @@ static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
return d->state_use_accessors & IRQD_SETAFFINITY_PENDING;
}
+static inline bool irqd_is_per_cpu(struct irq_data *d)
+{
+ return d->state_use_accessors & IRQD_PER_CPU;
+}
+
+static inline bool irqd_can_balance(struct irq_data *d)
+{
+ return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING));
+}
+
/**
* struct irq_chip - hardware interrupt chip descriptor
*