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| author | Jason Gunthorpe <jgg@nvidia.com> | 2020-09-18 15:42:21 +0300 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2020-09-18 16:31:45 +0300 |
| commit | a1255fff5d9066f9f3c761cba258b75d49bd8750 (patch) | |
| tree | 0bf0babb72d5d0ef984a4a7723c78544a739334c /include | |
| parent | 5dee5872f87552cfb173c899d35fc1413c2aa77f (diff) | |
| parent | 54a38b6627d3f11028f806f1f529a68453a77f46 (diff) | |
| download | linux-a1255fff5d9066f9f3c761cba258b75d49bd8750.tar.xz | |
Merge branch 'mlx_sw_owner_v2' into rdma.git for-next
Leon Romanovsky says:
====================
This series from Alex extends software steering interface to support
devices with extra capability "sw_owner_2" which will replace existing
"sw_owner".
====================
Based on the mlx5-next branch at
git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux
due to dependencies.
* branch 'mlx5_sw_owner_v2:
RDMA/mlx5: Expose TIR and QP ICM address for sw_owner_v2 devices
RDMA/mlx5: Allow DM allocation for sw_owner_v2 enabled devices
RDMA/mlx5: Add sw_owner_v2 bit capability
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index aee25e4fb2cc..651591a2965d 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -420,7 +420,8 @@ struct mlx5_ifc_flow_table_prop_layout_bits { u8 reserved_at_1a[0x2]; u8 ipsec_encrypt[0x1]; u8 ipsec_decrypt[0x1]; - u8 reserved_at_1e[0x2]; + u8 sw_owner_v2[0x1]; + u8 reserved_at_1f[0x1]; u8 termination_table_raw_traffic[0x1]; u8 reserved_at_21[0x1]; |