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| author | Neta Ostrovsky <netao@nvidia.com> | 2021-04-18 16:41:26 +0300 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2021-04-22 16:30:27 +0300 |
| commit | c6c11ad3ab9fe5eb279479879e3461da99f6fdf0 (patch) | |
| tree | 11447daa95f08f6a941d713ccd4b43f51fe5db58 /include/uapi/rdma | |
| parent | 391c6bd5ac80094a5a8984d7ca20df7e3ec5b837 (diff) | |
| download | linux-c6c11ad3ab9fe5eb279479879e3461da99f6fdf0.tar.xz | |
RDMA/nldev: Add QP numbers to SRQ information
Add QP numbers that are associated with the SRQ to the SRQ information.
The QPs are displayed in a range form.
Sample output:
$ rdma res show srq
dev ibp8s0f0 srqn 0 type BASIC pdn 3 comm [ib_ipoib]
dev ibp8s0f0 srqn 4 type BASIC lqpn 125-128,130-140 pdn 9 pid 3581 comm ibv_srq_pingpon
dev ibp8s0f0 srqn 5 type BASIC lqpn 141-156 pdn 10 pid 3584 comm ibv_srq_pingpon
dev ibp8s0f0 srqn 6 type BASIC lqpn 157-172 pdn 11 pid 3590 comm ibv_srq_pingpon
dev ibp8s0f1 srqn 0 type BASIC pdn 3 comm [ib_ipoib]
dev ibp8s0f1 srqn 1 type BASIC lqpn 329-344 pdn 4 pid 3586 comm ibv_srq_pingpon
$ rdma res show srq lqpn 126-141
dev ibp8s0f0 srqn 4 type BASIC lqpn 126-128,130-140 pdn 9 pid 3581 comm ibv_srq_pingpon
dev ibp8s0f0 srqn 5 type BASIC lqpn 141 pdn 10 pid 3584 comm ibv_srq_pingpon
$ rdma res show srq lqpn 127
dev ibp8s0f0 srqn 4 type BASIC lqpn 127 pdn 9 pid 3581 comm ibv_srq_pingpon
Link: https://lore.kernel.org/r/79a4bd4caec2248fd9583cccc26786af8e4414fc.1618753110.git.leonro@nvidia.com
Signed-off-by: Neta Ostrovsky <netao@nvidia.com>
Reviewed-by: Mark Zhang <markzhang@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'include/uapi/rdma')
| -rw-r--r-- | include/uapi/rdma/rdma_netlink.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/rdma/rdma_netlink.h b/include/uapi/rdma/rdma_netlink.h index 9abce20d39ad..2c8d405ec924 100644 --- a/include/uapi/rdma/rdma_netlink.h +++ b/include/uapi/rdma/rdma_netlink.h @@ -544,6 +544,8 @@ enum rdma_nldev_attr { RDMA_NLDEV_ATTR_RES_SRQ_ENTRY, /* nested table */ RDMA_NLDEV_ATTR_RES_SRQN, /* u32 */ + RDMA_NLDEV_ATTR_MIN_RANGE, /* u32 */ + RDMA_NLDEV_ATTR_MAX_RANGE, /* u32 */ /* * Always the end */ |