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| author | Jiri Kosina <jkosina@suse.cz> | 2013-01-29 13:48:30 +0400 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2013-01-29 13:48:30 +0400 |
| commit | 617677295b53a40d0e54aac4cbbc216ffbc755dd (patch) | |
| tree | 51b9e87213243ed5efff252c8e8d8fec4eebc588 /include/uapi/linux/serial_reg.h | |
| parent | 5c8d1b68e01a144813e38795fe6dbe7ebb506131 (diff) | |
| parent | 6abb7c25775b7fb2225ad0508236d63ca710e65f (diff) | |
| download | linux-617677295b53a40d0e54aac4cbbc216ffbc755dd.tar.xz | |
Merge branch 'master' into for-next
Conflicts:
drivers/devfreq/exynos4_bus.c
Sync with Linus' tree to be able to apply patches that are
against newer code (mvneta).
Diffstat (limited to 'include/uapi/linux/serial_reg.h')
| -rw-r--r-- | include/uapi/linux/serial_reg.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h index 5ed325e88a81..e6322605b138 100644 --- a/include/uapi/linux/serial_reg.h +++ b/include/uapi/linux/serial_reg.h @@ -367,5 +367,23 @@ #define UART_OMAP_MDR1_CIR_MODE 0x06 /* CIR mode */ #define UART_OMAP_MDR1_DISABLE 0x07 /* Disable (default state) */ +/* + * These are definitions for the Exar XR17V35X and XR17(C|D)15X + */ +#define UART_EXAR_8XMODE 0x88 /* 8X sampling rate select */ +#define UART_EXAR_SLEEP 0x8b /* Sleep mode */ +#define UART_EXAR_DVID 0x8d /* Device identification */ + +#define UART_EXAR_FCTR 0x08 /* Feature Control Register */ +#define UART_FCTR_EXAR_IRDA 0x08 /* IrDa data encode select */ +#define UART_FCTR_EXAR_485 0x10 /* Auto 485 half duplex dir ctl */ +#define UART_FCTR_EXAR_TRGA 0x00 /* FIFO trigger table A */ +#define UART_FCTR_EXAR_TRGB 0x60 /* FIFO trigger table B */ +#define UART_FCTR_EXAR_TRGC 0x80 /* FIFO trigger table C */ +#define UART_FCTR_EXAR_TRGD 0xc0 /* FIFO trigger table D programmable */ + +#define UART_EXAR_TXTRG 0x0a /* Tx FIFO trigger level write-only */ +#define UART_EXAR_RXTRG 0x0b /* Rx FIFO trigger level write-only */ + #endif /* _LINUX_SERIAL_REG_H */ |