diff options
| author | Yevgeny Kliteynik <kliteyn@nvidia.com> | 2023-04-02 17:14:10 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-05-30 15:55:33 +0300 |
| commit | e8a974bbf4a5387ed7fd4e42f97e6e067a89b827 (patch) | |
| tree | 574e5fa1e46565720e3b33a2e4df80211e3a5572 /include/linux | |
| parent | 5e0cc0d502d42fb1eed6a4d39ef26b1257ac9908 (diff) | |
| download | linux-e8a974bbf4a5387ed7fd4e42f97e6e067a89b827.tar.xz | |
net/mlx5: DR, Check force-loopback RC QP capability independently from RoCE
commit c7dd225bc224726c22db08e680bf787f60ebdee3 upstream.
SW Steering uses RC QP for writing STEs to ICM. This writingis done in LB
(loopback), and FL (force-loopback) QP is preferred for performance. FL is
available when RoCE is enabled or disabled based on RoCE caps.
This patch adds reading of FL capability from HCA caps in addition to the
existing reading from RoCE caps, thus fixing the case where we didn't
have loopback enabled when RoCE was disabled.
Fixes: 7304d603a57a ("net/mlx5: DR, Add support for force-loopback QP")
Signed-off-by: Itamar Gozlan <igozlan@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 442b6ac8a66c..b89992e8a3c8 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -1513,7 +1513,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 rc[0x1]; u8 uar_4k[0x1]; - u8 reserved_at_241[0x9]; + u8 reserved_at_241[0x7]; + u8 fl_rc_qp_when_roce_disabled[0x1]; + u8 regexp_params[0x1]; u8 uar_sz[0x6]; u8 reserved_at_248[0x2]; u8 umem_uid_0[0x1]; |