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authorKumar Gala <galak@freescale.com>2005-06-22 04:15:18 +0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-22 05:46:23 +0400
commit5b37b700f7c491a9320f4e29472bbaf23dded8fd (patch)
treee8a77c322bec5e75f0524c99f3be61645560b3c3 /include/linux
parentda3caa204ca40c32dcb751ebead2a6835b83e8d1 (diff)
downloadlinux-5b37b700f7c491a9320f4e29472bbaf23dded8fd.tar.xz
[PATCH] ppc32: Added support for new MPC8548 family of PowerQUICC III processors
Added descriptions of the new MPC8548 family processors, e500 core and peripherals. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/fsl_devices.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index faaff4c64559..70f54af87b9f 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -51,6 +51,7 @@ struct gianfar_platform_data {
/* board specific information */
u32 board_flags;
+ u32 phy_flags;
u32 phyid;
u32 interruptPHY;
u8 mac_addr[6];
@@ -61,9 +62,14 @@ struct gianfar_platform_data {
#define FSL_GIANFAR_DEV_HAS_COALESCE 0x00000002
#define FSL_GIANFAR_DEV_HAS_RMON 0x00000004
#define FSL_GIANFAR_DEV_HAS_MULTI_INTR 0x00000008
+#define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010
+#define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
+#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
+#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
/* Flags in gianfar_platform_data */
-#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* if not set use a timer */
+#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
+#define FSL_GIANFAR_BRD_IS_REDUCED 0x00000002 /* Set if RGMII, RMII */
struct fsl_i2c_platform_data {
/* device specific information */