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authorDavid S. Miller <davem@davemloft.net>2013-12-20 04:05:15 +0400
committerDavid S. Miller <davem@davemloft.net>2013-12-20 04:05:15 +0400
commit9ddffb8a1103e9c716b152a80e46c95cba1ca6b2 (patch)
treec8c21acd38576bc0518d79d4784dfc8938327ce0 /include/linux
parent5b59d467ad9ff9c014b99f4cfc2ea627b0806d07 (diff)
parent982290a7fe36e528af292d3e3b61939b1900bfc6 (diff)
downloadlinux-9ddffb8a1103e9c716b152a80e46c95cba1ca6b2.tar.xz
Merge branch 'mlx4'
Amir Vadai says: ==================== net/mlx4: Mellanox driver update 08-12-2013 This patchset contains: 1. Support in ndo_get_phys_port_id added by Hadar. 2. Change the driver to use by default CQE/EQE size of 64 bytes done by Eyal. This doubles the packet-rate of the NIC. 3. Configure the XPS queue mapping on driver load - added by Ido. 4. Fixes for some small bugs done by Jenny and Matan Patchset was applied and tested against commit: "2372175 lib: hash: follow-up fixups for arch hash" Changes from V1: - Removed Patch 10 "net/mlx4_en: Fix Supported/Advertised link mode reported by ethtool". This patch is needed to be rewritten from scratch and I wouldn't like it to block the rest of the patches in this set. Also, fix to Kconfig suggested by Ben will be sent in next patchset. Changes from V0: - Found some issues in "Reuse memory in RX flow" patch from V0. Removing this patch from the patchset till analyzed and fixed. - Fix some coding style issues in patch 6 "Configure the XPS queue mapping on driver load" - Changed patch 9 "Add NAPI support for transmit side" to use NAPI_POLL_WEIGHT instead of MLX4_EN_TX_BUDGET ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mlx4/device.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 7d3a523160ba..294b7c58fe95 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -454,6 +454,7 @@ struct mlx4_caps {
u32 userspace_caps; /* userspace must be aware of these */
u32 function_caps; /* VFs must be aware of these */
u16 hca_core_clock;
+ u64 phys_port_id[MLX4_MAX_PORTS + 1];
};
struct mlx4_buf_list {
@@ -1113,6 +1114,7 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char *name, struct cpu_rmap *rmap,
int *vector);
void mlx4_release_eq(struct mlx4_dev *dev, int vec);
+int mlx4_get_phys_port_id(struct mlx4_dev *dev);
int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port);
int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port);