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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2011-07-07 04:57:10 +0400
committerGreg Kroah-Hartman <gregkh@suse.de>2011-07-09 01:57:11 +0400
commitf2e9039a43b01f01cab9dfaea2cad5f304fb3343 (patch)
tree44ddb1f51f05b3cd51a8e08eea08d0d8d7c7362e /include/linux/usb/r8a66597.h
parent81463c1d707186adbbe534016cd1249edeab0dac (diff)
downloadlinux-f2e9039a43b01f01cab9dfaea2cad5f304fb3343.tar.xz
usb: r8a66597-hcd: add function for external controller
R8A66597 has the pin of WR0 and WR1. So, if one write-pin of CPU connects to the pins, we have to change the setting of FIFOSEL register in the controller. If we don't change the setting, the controller cannot send the data of odd length. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/linux/usb/r8a66597.h')
-rw-r--r--include/linux/usb/r8a66597.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h
index 26d216734057..30e171683a85 100644
--- a/include/linux/usb/r8a66597.h
+++ b/include/linux/usb/r8a66597.h
@@ -42,6 +42,9 @@ struct r8a66597_platdata {
/* set one = big endian, set zero = little endian */
unsigned endian:1;
+
+ /* (external controller only) set one = WR0_N shorted to WR1_N */
+ unsigned wr0_shorted_to_wr1:1;
};
/* Register definitions */