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author | Sam Protsenko <semen.protsenko@linaro.org> | 2021-10-14 16:35:06 +0300 |
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committer | Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2021-10-15 10:48:40 +0300 |
commit | c072c4ef7ef09e1d6470c48cf52570487589b76a (patch) | |
tree | 23fde89567f814e1dd851f584f19650bc3a59877 /include/linux/soc | |
parent | 178d6c1b83e5244b866d90071246b3b0135c3f7d (diff) | |
download | linux-c072c4ef7ef09e1d6470c48cf52570487589b76a.tar.xz |
soc: samsung: exynos-chipid: Pass revision reg offsets
Old Exynos SoCs have both Product ID and Revision ID in one single
register, while new SoCs tend to have two separate registers for those
IDs. Implement handling of both cases by passing Revision ID register
offsets in driver data.
Previously existing macros for Exynos4210 (removed in this patch) were
incorrect:
#define EXYNOS_SUBREV_MASK (0xf << 4)
#define EXYNOS_MAINREV_MASK (0xf << 0)
Actual format of PRO_ID register in Exynos4210 (offset 0x0):
[31:12] Product ID
[9:8] Package information
[7:4] Main Revision Number
[3:0] Sub Revision Number
This patch doesn't change the behavior on existing platforms, so
'/sys/devices/soc0/revision' will show the same string as before.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Henrik Grimler <henrik@grimler.se>
Link: https://lore.kernel.org/r/20211014133508.1210-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Diffstat (limited to 'include/linux/soc')
-rw-r--r-- | include/linux/soc/samsung/exynos-chipid.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/include/linux/soc/samsung/exynos-chipid.h b/include/linux/soc/samsung/exynos-chipid.h index 8bca6763f99c..62f0e2531068 100644 --- a/include/linux/soc/samsung/exynos-chipid.h +++ b/include/linux/soc/samsung/exynos-chipid.h @@ -9,10 +9,8 @@ #define __LINUX_SOC_EXYNOS_CHIPID_H #define EXYNOS_CHIPID_REG_PRO_ID 0x00 -#define EXYNOS_SUBREV_MASK (0xf << 4) -#define EXYNOS_MAINREV_MASK (0xf << 0) -#define EXYNOS_REV_MASK (EXYNOS_SUBREV_MASK | \ - EXYNOS_MAINREV_MASK) +#define EXYNOS_REV_PART_MASK 0xf +#define EXYNOS_REV_PART_SHIFT 4 #define EXYNOS_MASK 0xfffff000 #define EXYNOS_CHIPID_REG_PKG_ID 0x04 |