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authorMiquel Raynal <miquel.raynal@bootlin.com>2022-12-05 17:40:59 +0300
committerMiquel Raynal <miquel.raynal@bootlin.com>2022-12-05 17:40:59 +0300
commita34506e08db7ccce160a259e4b00b1e307486c59 (patch)
treeb046d4ec23c74a0e7ef08b0d0fdd266dbd629b3f /include/linux/mtd
parent1d46f1ae82494fae60802c1ed09ca5009e1b414c (diff)
parent1799cd8540b67b88514c82f5fae1c75b986bcbd8 (diff)
downloadlinux-a34506e08db7ccce160a259e4b00b1e307486c59.tar.xz
Merge tag 'spi-nor/for-6.2' into mtd/next
SPI NOR core changes: * Add support for flash reset using the dt reset-gpios property. * Update hwcaps.mask to include 8D-8D-8D read and page program ops when xSPI profile 1.0 table is defined. * Bypass zero erase size in spi_nor_find_best_erase_type(). * Fix select_uniform_erase to skip 0 erase size * Add generic flash driver. If a flash is not found in the flash_info array, fall back to the generic flash driver which is described solely by the flash's SFDP tables. * Fix the number of bytes for the dummy cycles in spi_nor_spimem_check_readop(). * Introduce SPI_NOR_QUAD_PP flag, as PP_1_1_4 is not SFDP discoverable. SPI NOR manufacturer drivers changes: * Spansion: - use PARSE_SFDP for s28hs512t, - add support for s28hl512t, s28hl01gt, and s28hs01gt. * Gigadevice: Replace default_init() with post_bfpt() for gd25q256. * Micron - ST: Enable locking for mt25qu256a. * Winbond: Add support for W25Q512NW-IQ. * ISSI: Use PARSE_SFDP and SPI_NOR_QUAD_PP. Fix merge conflict in the jedec,spi-nor bindings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'include/linux/mtd')
-rw-r--r--include/linux/mtd/spi-nor.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 42218a1164f6..25765556223a 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -349,6 +349,8 @@ struct spi_nor_flash_parameter;
* @bouncebuf: bounce buffer used when the buffer passed by the MTD
* layer is not DMA-able
* @bouncebuf_size: size of the bounce buffer
+ * @id: The flash's ID bytes. Always contains
+ * SPI_NOR_MAX_ID_LEN bytes.
* @info: SPI NOR part JEDEC MFR ID and other info
* @manufacturer: SPI NOR manufacturer
* @addr_nbytes: number of address bytes
@@ -379,6 +381,7 @@ struct spi_nor {
struct spi_mem *spimem;
u8 *bouncebuf;
size_t bouncebuf_size;
+ u8 *id;
const struct flash_info *info;
const struct spi_nor_manufacturer *manufacturer;
u8 addr_nbytes;