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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2020-09-30 02:01:15 +0300 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2020-12-11 00:37:29 +0300 |
| commit | e5acf9c862974041f7b2f581d1a40ccd29769add (patch) | |
| tree | 505a34c1588fcede35e18c18b1aa23d5ea1f34c2 /include/linux/mtd/nand-ecc-sw-hamming.h | |
| parent | cbd87780bed580b585d2992f29077ac44950cb66 (diff) | |
| download | linux-e5acf9c862974041f7b2f581d1a40ccd29769add.tar.xz | |
mtd: nand: ecc-hamming: Move Hamming code to the generic NAND layer
Hamming ECC code might be later re-used by the SPI NAND layer.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-12-miquel.raynal@bootlin.com
Diffstat (limited to 'include/linux/mtd/nand-ecc-sw-hamming.h')
| -rw-r--r-- | include/linux/mtd/nand-ecc-sw-hamming.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/include/linux/mtd/nand-ecc-sw-hamming.h b/include/linux/mtd/nand-ecc-sw-hamming.h new file mode 100644 index 000000000000..30a0cfa50eed --- /dev/null +++ b/include/linux/mtd/nand-ecc-sw-hamming.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2000-2010 Steven J. Hill <sjhill@realitydiluted.com> + * David Woodhouse <dwmw2@infradead.org> + * Thomas Gleixner <tglx@linutronix.de> + * + * This file is the header for the ECC algorithm. + */ + +#ifndef __MTD_NAND_ECC_SW_HAMMING_H__ +#define __MTD_NAND_ECC_SW_HAMMING_H__ + +struct nand_chip; + +/* + * Calculate 3 byte ECC code for eccsize byte block + */ +void __nand_calculate_ecc(const u_char *dat, unsigned int eccsize, + u_char *ecc_code, bool sm_order); + +/* + * Calculate 3 byte ECC code for 256/512 byte block + */ +int nand_calculate_ecc(struct nand_chip *chip, const u_char *dat, + u_char *ecc_code); + +/* + * Detect and correct a 1 bit error for eccsize byte block + */ +int __nand_correct_data(u_char *dat, u_char *read_ecc, u_char *calc_ecc, + unsigned int eccsize, bool sm_order); + +/* + * Detect and correct a 1 bit error for 256/512 byte block + */ +int nand_correct_data(struct nand_chip *chip, u_char *dat, u_char *read_ecc, + u_char *calc_ecc); + +#endif /* __MTD_NAND_ECC_SW_HAMMING_H__ */ |