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authorMasahiro Yamada <yamada.masahiro@socionext.com>2018-10-10 06:51:32 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2018-10-15 15:39:45 +0300
commit722fb61e2ed39473297157839ec7230b77fd6940 (patch)
tree2d3a59c32aa552b36a1f0d023d6708419eb0618a /include/linux/mfd/tmio.h
parentacb9fce7309a38d25be7331375012b9481f20b27 (diff)
downloadlinux-722fb61e2ed39473297157839ec7230b77fd6940.tar.xz
mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flag
TMIO_MMC_HAVE_HIGH_REG is confusing due to its counter-intuitive name. All the TMIO MMC variants (TMIO MMC, Renesas SDHI, UniPhier SD) actually have high registers. It is just that each of them implements its own registers there. The original IP from Panasonic only defines registers 0x00-0xff in the bus_shift=1 review. The register area above them is platform-dependent. In fact, TMIO_MMC_HAVE_HIGH_REG is set only by tmio-mmc.c and used to test the accessibility of CTL_SDIO_REGS. Because it is specific to the TMIO MFD variant, the right thing to do is to move such registers to tmio_mmc.c and delete the TMIO_MMC_HAVE_HIGH_REG flag. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux/mfd/tmio.h')
-rw-r--r--include/linux/mfd/tmio.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 77866214ab51..1e70060c92ce 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -62,13 +62,6 @@
#define TMIO_MMC_USE_GPIO_CD BIT(5)
/*
- * Some controllers doesn't have over 0x100 register.
- * it is used to checking accessibility of
- * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL
- */
-#define TMIO_MMC_HAVE_HIGH_REG BIT(6)
-
-/*
* Some controllers have CMD12 automatically
* issue/non-issue register
*/