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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2018-08-30 19:52:52 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-12-01 11:13:45 +0300
commit03336f71d1cbebb15add363d13060863d8df9762 (patch)
treedc3cac47dac1a1b08694a39ca5b4a16c5d9b9396 /include/linux/mfd/intel_soc_pmic.h
parentff00b5656fb0de41a23c8c5ecb8d848b5fd88614 (diff)
downloadlinux-03336f71d1cbebb15add363d13060863d8df9762.tar.xz
mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well
[ Upstream commit 9f8ddee1dab836ca758ca8fc555ab5a3aaa5d3fd ] Power button IRQ actually has a second level of interrupts to distinguish between UI and POWER buttons. Moreover, current implementation looks awkward in approach to handle second level IRQs by first level related IRQ chip. To address above issues, split power button IRQ to be chained as well. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'include/linux/mfd/intel_soc_pmic.h')
-rw-r--r--include/linux/mfd/intel_soc_pmic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mfd/intel_soc_pmic.h b/include/linux/mfd/intel_soc_pmic.h
index 5aacdb017a9f..806a4f095312 100644
--- a/include/linux/mfd/intel_soc_pmic.h
+++ b/include/linux/mfd/intel_soc_pmic.h
@@ -25,6 +25,7 @@ struct intel_soc_pmic {
int irq;
struct regmap *regmap;
struct regmap_irq_chip_data *irq_chip_data;
+ struct regmap_irq_chip_data *irq_chip_data_pwrbtn;
struct regmap_irq_chip_data *irq_chip_data_tmu;
struct regmap_irq_chip_data *irq_chip_data_bcu;
struct regmap_irq_chip_data *irq_chip_data_adc;